diff options
| author | Inochi Amaoto <inochiama@gmail.com> | 2025-05-04 18:45:52 +0800 |
|---|---|---|
| committer | Inochi Amaoto <inochiama@gmail.com> | 2025-05-19 06:23:26 +0800 |
| commit | 108a76779829a5e8001b1051080aaa93e7fc02ea (patch) | |
| tree | e2df7416ee9345327bc3380357dfc086b5c5bd1b | |
| parent | ae5bac370ed40ce09d4d0f35e7149f4dc6ec893f (diff) | |
riscv: dts: sophgo: switch precise compatible for existed clock device for CV18XX
replace newly added precise compatible with old one for existed
clock device of CV18XX series SoCs.
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Link: https://lore.kernel.org/r/20250504104553.1447819-4-inochiama@gmail.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
| -rw-r--r-- | arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 2 | ||||
| -rw-r--r-- | arch/riscv/boot/dts/sophgo/cv1812h.dtsi | 2 | ||||
| -rw-r--r-- | arch/riscv/boot/dts/sophgo/sg2002.dtsi | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi index 88707cc13fb4..90de978f69c1 100644 --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi @@ -29,7 +29,7 @@ }; clk: clock-controller@3002000 { - compatible = "sophgo,cv1800-clk"; + compatible = "sophgo,cv1800b-clk"; reg = <0x03002000 0x1000>; clocks = <&osc>; #clock-cells = <1>; diff --git a/arch/riscv/boot/dts/sophgo/cv1812h.dtsi b/arch/riscv/boot/dts/sophgo/cv1812h.dtsi index 0974955e4e05..9a2a314d3347 100644 --- a/arch/riscv/boot/dts/sophgo/cv1812h.dtsi +++ b/arch/riscv/boot/dts/sophgo/cv1812h.dtsi @@ -31,7 +31,7 @@ }; clk: clock-controller@3002000 { - compatible = "sophgo,cv1810-clk"; + compatible = "sophgo,cv1812h-clk"; reg = <0x03002000 0x1000>; clocks = <&osc>; #clock-cells = <1>; diff --git a/arch/riscv/boot/dts/sophgo/sg2002.dtsi b/arch/riscv/boot/dts/sophgo/sg2002.dtsi index 6f09c9199102..98001cce238e 100644 --- a/arch/riscv/boot/dts/sophgo/sg2002.dtsi +++ b/arch/riscv/boot/dts/sophgo/sg2002.dtsi @@ -31,7 +31,7 @@ }; clk: clock-controller@3002000 { - compatible = "sophgo,sg2000-clk"; + compatible = "sophgo,sg2002-clk", "sophgo,sg2000-clk"; reg = <0x03002000 0x1000>; clocks = <&osc>; #clock-cells = <1>; |