diff options
| author | Khairul Anuar Romli <khairul.anuar.romli@altera.com> | 2025-11-07 07:35:26 +0800 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@kernel.org> | 2025-11-10 21:00:37 -0600 |
| commit | 1aa4ee5338cbca1c5118d5a09b523d3818dddc2f (patch) | |
| tree | f025bef6f0827ea4bb6fae4ee9ed692c63d1084d | |
| parent | dd94481408ba0e3b68c42d3ee986d83215a9fac9 (diff) | |
arm64: dts: socfpga: Add Agilex5 SVC node with memory region
Introduce the Stratix10 SoC Service Layer (SVC) node for Agilex5 SoCs. This
node includes the compatible string "intel,agilex5-svc" and references a
reserved memory region used for communication with the Secure Device
Manager (SDM).
Agilex5 introduces changes in how reserved memory is mapped and accessed
compared to previous SoC generations. This commit updates the device tree
structure to support Agilex5-specific handling of the SVC interface.
Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli@altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi index 408911ea7bc5..bf7128adddde 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi @@ -79,6 +79,15 @@ }; + firmware { + svc { + compatible = "intel,agilex5-svc"; + method = "smc"; + memory-region = <&service_reserved>; + iommus = <&smmu 10>; + }; + }; + psci { compatible = "arm,psci-0.2"; method = "smc"; |