diff options
| author | Tariq Toukan <tariqt@nvidia.com> | 2025-09-22 09:06:30 +0300 |
|---|---|---|
| committer | Leon Romanovsky <leon@kernel.org> | 2025-09-28 03:36:36 -0400 |
| commit | 1ddf1636e0e058adf2231486da0419243eb49539 (patch) | |
| tree | e74f1ce99733b76ff9f0fa096500446eca2eb03c | |
| parent | a3d076b0567e729d5f21a95525c4d096b1f59e79 (diff) | |
net/mlx5: Add IFC bit for TIR/SQ order capability
Before this cap, firmware requested a certain creation order between TIR
objects and SQs of the same transport domain to properly support the
self loopback prevention feature. If order is not preserved, explicit
modify_tir operations are necessary after the opening of the SQs.
When set, this cap bit indicates that this firmware requirement /
limitation no longer holds.
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/1758521191-814350-2-git-send-email-tariqt@nvidia.com
Reviewed-by: Carolina Jubran <cjubran@nvidia.com>
Reviewed-by: Dragos Tatulea <dtatulea@nvidia.com>
Signed-off-by: Leon Romanovsky <leon@kernel.org>
| -rw-r--r-- | include/linux/mlx5/mlx5_ifc.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index 0cf187e13def..c0f5fee7a4a5 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -1895,7 +1895,8 @@ struct mlx5_ifc_cmd_hca_cap_bits { u8 reserved_at_2a0[0x7]; u8 mkey_pcie_tph[0x1]; - u8 reserved_at_2a8[0x2]; + u8 reserved_at_2a8[0x1]; + u8 tis_tir_td_order[0x1]; u8 psp[0x1]; u8 shampo[0x1]; |