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authorVivian Wang <wangruikang@iscas.ac.cn>2025-09-14 12:23:15 +0800
committerPaolo Abeni <pabeni@redhat.com>2025-09-16 12:43:49 +0200
commit3c247a6366d5891f1ac60fe37a530acda3a12d06 (patch)
tree311d9b9b23eae5ecfc2e8c8bf3525a947e0a241b
parent60775f28cfb7d46d7b1945c527929ac20e99ac44 (diff)
riscv: dts: spacemit: Add Ethernet support for BPI-F3
Banana Pi BPI-F3 uses an RGMII PHY for each port and uses GPIO for PHY reset. Tested-by: Hendrik Hamerlinck <hendrik.hamerlinck@hammernet.be> Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn> Reviewed-by: Yixun Lan <dlan@gentoo.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20250914-net-k1-emac-v12-4-65b31b398f44@iscas.ac.cn Signed-off-by: Paolo Abeni <pabeni@redhat.com>
-rw-r--r--arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts48
1 files changed, 48 insertions, 0 deletions
diff --git a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
index fe22c747c501..33e223cefd4b 100644
--- a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
+++ b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
@@ -11,6 +11,8 @@
compatible = "bananapi,bpi-f3", "spacemit,k1";
aliases {
+ ethernet0 = &eth0;
+ ethernet1 = &eth1;
serial0 = &uart0;
};
@@ -40,6 +42,52 @@
status = "okay";
};
+&eth0 {
+ phy-handle = <&rgmii0>;
+ phy-mode = "rgmii-id";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac0_cfg>;
+ rx-internal-delay-ps = <0>;
+ tx-internal-delay-ps = <0>;
+ status = "okay";
+
+ mdio-bus {
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+
+ reset-gpios = <&gpio K1_GPIO(110) GPIO_ACTIVE_LOW>;
+ reset-delay-us = <10000>;
+ reset-post-delay-us = <100000>;
+
+ rgmii0: phy@1 {
+ reg = <0x1>;
+ };
+ };
+};
+
+&eth1 {
+ phy-handle = <&rgmii1>;
+ phy-mode = "rgmii-id";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac1_cfg>;
+ rx-internal-delay-ps = <0>;
+ tx-internal-delay-ps = <250>;
+ status = "okay";
+
+ mdio-bus {
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+
+ reset-gpios = <&gpio K1_GPIO(115) GPIO_ACTIVE_LOW>;
+ reset-delay-us = <10000>;
+ reset-post-delay-us = <100000>;
+
+ rgmii1: phy@1 {
+ reg = <0x1>;
+ };
+ };
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_2_cfg>;