diff options
| author | Zhang Rui <rui.zhang@intel.com> | 2025-10-23 15:37:52 -0700 |
|---|---|---|
| committer | Peter Zijlstra <peterz@infradead.org> | 2025-10-29 10:29:54 +0100 |
| commit | 4ba45f041abe60337fdeeb68553b9ee1217d544e (patch) | |
| tree | 0b02659c8ab1072e426c52848324ea69562bc778 | |
| parent | e39b82f6cb0526c551d4651ba6d286b6b1f9e9c3 (diff) | |
perf/x86/intel/cstate: Remove PC3 support from LunarLake
LunarLake doesn't support Package C3. Remove the PC3 residency counter
support from LunarLake.
Fixes: 26579860fbd5 ("perf/x86/intel/cstate: Add Lunarlake support")
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Kan Liang <kan.liang@linux.intel.com>
Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Link: https://patch.msgid.link/20251023223754.1743928-3-zide.chen@intel.com
| -rw-r--r-- | arch/x86/events/intel/cstate.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/x86/events/intel/cstate.c b/arch/x86/events/intel/cstate.c index a5f2e0be2337..2bfd011f99da 100644 --- a/arch/x86/events/intel/cstate.c +++ b/arch/x86/events/intel/cstate.c @@ -70,7 +70,7 @@ * perf code: 0x01 * Available model: NHM,WSM,SNB,IVB,HSW,BDW,SKL,KNL, * GLM,CNL,KBL,CML,ICL,TGL,TNT,RKL, - * ADL,RPL,MTL,ARL,LNL + * ADL,RPL,MTL,ARL * Scope: Package (physical package) * MSR_PKG_C6_RESIDENCY: Package C6 Residency Counter. * perf code: 0x02 @@ -522,7 +522,6 @@ static const struct cstate_model lnl_cstates __initconst = { BIT(PERF_CSTATE_CORE_C7_RES), .pkg_events = BIT(PERF_CSTATE_PKG_C2_RES) | - BIT(PERF_CSTATE_PKG_C3_RES) | BIT(PERF_CSTATE_PKG_C6_RES) | BIT(PERF_CSTATE_PKG_C10_RES), }; |