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authorNikunj Kela <quic_nkela@quicinc.com>2025-07-21 23:15:25 +0530
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2025-07-22 18:52:50 +0200
commit4c83146cfb466ef24fcb9cf110f3b8821d1d2d85 (patch)
tree33f35e676ae707958045c60d40443ea33a392397
parenta8d455db2621ff5223416ead264f346d8164c92f (diff)
dt-bindings: serial: describe SA8255p
SA8255p platform abstracts resources such as clocks, interconnect and GPIO pins configuration in Firmware. SCMI power and perf protocols are used to send request for resource configurations. Add DT bindings for the QUP GENI UART controller on sa8255p platform. The wakeup interrupt (IRQ) is treated as optional, as not all UART instances have a wakeup-capable interrupt routed via the PDC. Signed-off-by: Nikunj Kela <quic_nkela@quicinc.com> Co-developed-by: Praveen Talari <quic_ptalari@quicinc.com> Signed-off-by: Praveen Talari <quic_ptalari@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250721174532.14022-2-quic_ptalari@quicinc.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml69
1 files changed, 69 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml b/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml
new file mode 100644
index 000000000000..c8f01923cb25
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml
@@ -0,0 +1,69 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/serial/qcom,sa8255p-geni-uart.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Geni based QUP UART interface
+
+maintainers:
+ - Praveen Talari <quic_ptalari@quicinc.com>
+
+allOf:
+ - $ref: /schemas/serial/serial.yaml#
+
+properties:
+ compatible:
+ enum:
+ - qcom,sa8255p-geni-uart
+ - qcom,sa8255p-geni-debug-uart
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ minItems: 1
+ items:
+ - description: UART core irq
+ - description: Wakeup irq (RX GPIO)
+
+ interrupt-names:
+ description:
+ The UART interrupt and optionally the RX in-band wakeup interrupt
+ as not all UART instances have a wakeup-capable interrupt routed
+ via the PDC.
+ minItems: 1
+ items:
+ - const: uart
+ - const: wakeup
+
+ power-domains:
+ minItems: 2
+ maxItems: 2
+
+ power-domain-names:
+ items:
+ - const: power
+ - const: perf
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - power-domains
+ - power-domain-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ serial@990000 {
+ compatible = "qcom,sa8255p-geni-uart";
+ reg = <0x990000 0x4000>;
+ interrupts = <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&scmi0_pd 0>, <&scmi0_dvfs 0>;
+ power-domain-names = "power", "perf";
+ };
+...