summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorBiju Das <biju.das.jz@bp.renesas.com>2022-04-02 09:13:23 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2022-04-13 13:56:09 +0200
commit4e44055440e1fef93e830bd06111bbbb0a89fa44 (patch)
tree810f81733370d382cc00311caa7be2e6ee141f22
parent2d10555298576a95b637a5087751d0aad570964d (diff)
arm64: dts: renesas: rzg2ul-smarc: Add scif0 and audio clk pins
Add scif0 and audio clk pins to soc pinctrl dtsi and drop deleting the pinctrl-0 and pinctrl-names properties for scif0 node so that we now actually make use of these properties for scif0. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220402081328.26292-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-rw-r--r--arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts6
-rw-r--r--arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi24
2 files changed, 25 insertions, 5 deletions
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts b/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts
index aaa29f83e84c..64370faf8f6d 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts
+++ b/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts
@@ -8,6 +8,7 @@
/dts-v1/;
#include "r9a07g043.dtsi"
#include "rzg2ul-smarc-som.dtsi"
+#include "rzg2ul-smarc-pinfunction.dtsi"
#include "rz-smarc-common.dtsi"
/ {
@@ -73,11 +74,6 @@
status = "disabled";
};
-&scif0 {
- /delete-property/ pinctrl-0;
- /delete-property/ pinctrl-names;
-};
-
&sdhi1 {
/delete-property/ pinctrl-0;
/delete-property/ pinctrl-1;
diff --git a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi
new file mode 100644
index 000000000000..2db9c92cf01f
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Device Tree Source for the RZ/G2UL SMARC pincontrol parts
+ *
+ * Copyright (C) 2022 Renesas Electronics Corp.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
+
+&pinctrl {
+ pinctrl-0 = <&sound_clk_pins>;
+ pinctrl-names = "default";
+
+ scif0_pins: scif0 {
+ pinmux = <RZG2L_PORT_PINMUX(6, 4, 6)>, /* TxD */
+ <RZG2L_PORT_PINMUX(6, 3, 6)>; /* RxD */
+ };
+
+ sound_clk_pins: sound_clk {
+ pins = "AUDIO_CLK1", "AUDIO_CLK2";
+ input-enable;
+ };
+};