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authorChen Wang <unicorn_wang@outlook.com>2025-10-20 11:40:09 +0800
committerInochi Amaoto <inochiama@gmail.com>2025-11-02 07:42:29 +0800
commit579d6526aa43a155c8685a88ef8350a8c29afa47 (patch)
tree570fc6760870d67befad58d4cae47626f79fa6ae
parentc6c215099e89b1eb71ed6592163ae5b530f4538e (diff)
riscv: sophgo: dts: enable PCIe for SG2042_EVB_V2.0
Enable PCIe controllers for Sophgo SG2042_EVB_V2.0 board, which uses SG2042 SoC. Signed-off-by: Han Gao <rabenda.cn@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Link: https://lore.kernel.org/r/50a753f9b8cbd5a90b5b2df737f87fc77a9b33a7.1760929111.git.unicorn_wang@outlook.com Tested-by: Han Gao <rabenda.cn@gmail.com> Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
-rw-r--r--arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts b/arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts
index 46980e41b886..0cd0dc0f537c 100644
--- a/arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts
+++ b/arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts
@@ -152,6 +152,18 @@
};
};
+&pcie_rc0 {
+ status = "okay";
+};
+
+&pcie_rc1 {
+ status = "okay";
+};
+
+&pcie_rc2 {
+ status = "okay";
+};
+
&pinctrl {
emmc_cfg: sdhci-emmc-cfg {
sdhci-emmc-wp-pins {