diff options
| author | Vandita Kulkarni <vandita.kulkarni@intel.com> | 2021-10-19 20:44:34 +0530 |
|---|---|---|
| committer | Vandita Kulkarni <vandita.kulkarni@intel.com> | 2021-11-15 11:15:20 +0530 |
| commit | 5a06f68dbe0fb9cc08db9cfae310c7933aebd6d2 (patch) | |
| tree | cfc99307c7d5895768909d73ec2a1fab7e08670f | |
| parent | 09eea212653304522e9ec74cdda59721af8d4969 (diff) | |
drm/i915/dsi/xelpd: Disable DC states in Video mode
MIPI DSI transcoder cannot be in video mode to support any of the
display C states.
Bspec: 49195 (For DC*co DSI transcoders cannot be in video mode)
Bspec: 49193 (Hardware does not support DC5 or DC6 with MIPI DSI enabled)
Bspec: 49188 (desc of DSI_DCSTATE_CTL talks about cmd mode PM control
v2: Align to the power domain ordering (Jani)
Add bspec references (Imre)
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211019151435.20477-4-vandita.kulkarni@intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_display_power.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c index a31974aa37ce..d30639a59ea5 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power.c +++ b/drivers/gpu/drm/i915/display/intel_display_power.c @@ -3111,6 +3111,7 @@ intel_display_power_put_mask_in_set(struct drm_i915_private *i915, BIT_ULL(POWER_DOMAIN_MODESET) | \ BIT_ULL(POWER_DOMAIN_AUX_A) | \ BIT_ULL(POWER_DOMAIN_AUX_B) | \ + BIT_ULL(POWER_DOMAIN_PORT_DSI) | \ BIT_ULL(POWER_DOMAIN_INIT)) #define XELPD_AUX_IO_D_XELPD_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_D_XELPD) |