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authorGatien Chevallier <gatien.chevallier@foss.st.com>2025-09-04 09:40:57 +0200
committerAlexandre Torgue <alexandre.torgue@foss.st.com>2025-09-15 17:51:31 +0200
commit74e42b3c5938a643a32106e2921a6f3b0fc75872 (patch)
tree0a6162ca23860599e41f0eb7c6da1ce24a89d89a
parent4c2ac7b9abc8d7d3407cca3677835d137a748492 (diff)
arm64: dts: st: enable ethernet1 controller on stm32mp257f-dk
ethernet1 controller is connected to the RTL8211F-CG Realtek PHY in RGMII mode. Enable this peripheral on the stm32mp257f-dk board. Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Link: https://lore.kernel.org/r/20250904-mp2_ethernet-v2-2-05a060157fb7@foss.st.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
-rw-r--r--arch/arm64/boot/dts/st/stm32mp257f-dk.dts23
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/st/stm32mp257f-dk.dts b/arch/arm64/boot/dts/st/stm32mp257f-dk.dts
index a278a1e3ce03..e718d888ce21 100644
--- a/arch/arm64/boot/dts/st/stm32mp257f-dk.dts
+++ b/arch/arm64/boot/dts/st/stm32mp257f-dk.dts
@@ -19,6 +19,7 @@
compatible = "st,stm32mp257f-dk", "st,stm32mp257";
aliases {
+ ethernet0 = &ethernet1;
serial0 = &usart2;
};
@@ -77,6 +78,28 @@
status = "okay";
};
+&ethernet1 {
+ pinctrl-0 = <&eth1_rgmii_pins_b>;
+ pinctrl-1 = <&eth1_rgmii_sleep_pins_b>;
+ pinctrl-names = "default", "sleep";
+ phy-handle = <&phy1_eth1>;
+ phy-mode = "rgmii-id";
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ phy1_eth1: ethernet-phy@1 {
+ compatible = "ethernet-phy-id001c.c916";
+ reg = <1>;
+ reset-gpios = <&gpioa 2 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <10000>;
+ reset-deassert-us = <80000>;
+ };
+ };
+};
+
&scmi_regu {
scmi_vddio1: regulator@0 {
regulator-min-microvolt = <1800000>;