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| author | Svyatoslav Ryhel <clamor95@gmail.com> | 2025-07-30 08:54:23 +0300 | 
|---|---|---|
| committer | Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> | 2025-07-31 00:21:31 +0300 | 
| commit | 784c99331c8d54a51d4f3e772c81f7fb82b7a1f8 (patch) | |
| tree | 0e24d56309ea654dadb9a8b50c95e6b96d92ae82 | |
| parent | 85c23f28905cf20a86ceec3cfd7a0a5572c9eb13 (diff) | |
dt-bindings: display: bridge: Document Solomon SSD2825
Add bindings for Solomon SSD2825 MIPI master bridge chip that connects an
application processor with traditional parallel LCD interface and an LCD
driver with MIPI slave interface. The SSD2825 supports both parallel RGB
interface and serial SPI interface.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250730055424.6718-2-clamor95@gmail.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
| -rw-r--r-- | Documentation/devicetree/bindings/display/bridge/solomon,ssd2825.yaml | 141 | 
1 files changed, 141 insertions, 0 deletions
| diff --git a/Documentation/devicetree/bindings/display/bridge/solomon,ssd2825.yaml b/Documentation/devicetree/bindings/display/bridge/solomon,ssd2825.yaml new file mode 100644 index 000000000000..e2d293d623b8 --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/solomon,ssd2825.yaml @@ -0,0 +1,141 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/solomon,ssd2825.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Solomon SSD2825 RGB to MIPI-DSI bridge + +maintainers: +  - Svyatoslav Ryhel <clamor95@gmail.com> + +allOf: +  - $ref: /schemas/spi/spi-peripheral-props.yaml# + +properties: +  compatible: +    const: solomon,ssd2825 + +  reg: +    maxItems: 1 + +  reset-gpios: true + +  dvdd-supply: +    description: Regulator for 1.2V digital power supply. + +  avdd-supply: +    description: Regulator for 1.2V analog power supply. + +  vddio-supply: +    description: Regulator for 1.8V IO power supply. + +  spi-max-frequency: +    maximum: 1000000 + +  spi-cpha: true +  spi-cpol: true + +  clocks: +    maxItems: 1 +    description: Reference TX_CLK used before PLL is locked. + +  solomon,hs-zero-delay-ns: +    description: +      HS zero delay period +    minimum: 0 +    maximum: 1700 +    default: 133 + +  solomon,hs-prep-delay-ns: +    description: +      HS prep delay period +    minimum: 0 +    maximum: 1728 +    default: 40 + +  ports: +    $ref: /schemas/graph.yaml#/properties/ports + +    properties: +      port@0: +        $ref: /schemas/graph.yaml#/$defs/port-base +        unevaluatedProperties: false +        description: +          Video port for RGB input + +        properties: +          endpoint: +            $ref: /schemas/graph.yaml#/$defs/endpoint-base +            unevaluatedProperties: false + +            properties: +              bus-width: +                enum: [ 16, 18, 24 ] + +      port@1: +        $ref: /schemas/graph.yaml#/properties/port +        description: +          Video port for DSI output (panel or connector) + +    required: +      - port@0 +      - port@1 + +required: +  - compatible +  - ports + +additionalProperties: false + +examples: +  - | +    #include <dt-bindings/gpio/gpio.h> + +    spi { +        #address-cells = <1>; +        #size-cells = <0>; + +        dsi@2 { +            compatible = "solomon,ssd2825"; +            reg = <2>; + +            spi-max-frequency = <1000000>; + +            spi-cpha; +            spi-cpol; + +            reset-gpios = <&gpio 114 GPIO_ACTIVE_LOW>; + +            dvdd-supply = <&vdd_1v2>; +            avdd-supply = <&vdd_1v2>; +            vddio-supply = <&vdd_1v8_io>; + +            solomon,hs-zero-delay-ns = <300>; +            solomon,hs-prep-delay-ns = <65>; + +            clocks = <&ssd2825_tx_clk>; + +            ports { +                #address-cells = <1>; +                #size-cells = <0>; + +                port@0 { +                    reg = <0>; + +                    bridge_input: endpoint { +                        remote-endpoint = <&dpi_output>; +                        bus-width = <24>; +                    }; +                }; + +                port@1 { +                    reg = <1>; + +                    bridge_output: endpoint { +                        remote-endpoint = <&panel_input>; +                    }; +                }; +            }; +        }; +    }; | 
