diff options
author | Fenglin Wu <fenglin.wu@oss.qualcomm.com> | 2025-09-17 18:15:19 +0800 |
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committer | Sebastian Reichel <sebastian.reichel@collabora.com> | 2025-09-18 01:01:03 +0200 |
commit | 7f8624af8e8c2c1a0169b46a23729a4cc614635c (patch) | |
tree | f8dc4d015913a8875d07b2cb551b3dd2bbe80c05 | |
parent | b3c0f651b3cf4dfaf2e8210d7bb9b79471f6403b (diff) |
dt-bindings: soc: qcom,pmic-glink: Add charge limit nvmem properties
Add nvmem properties to retrieve charge control configurations
from the PMIC SDAM registers.
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Fenglin Wu <fenglin.wu@oss.qualcomm.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
-rw-r--r-- | Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml index 48114bb0c927..7085bf88afab 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml @@ -56,6 +56,20 @@ properties: The array should contain a gpio entry for each PMIC Glink connector, in reg order. It is defined that GPIO active level means "CC2" or Reversed/Flipped orientation. + nvmem-cells: + minItems: 3 + maxItems: 3 + description: + The nvmem cells contain the charge control settings, including the charge control + enable status, the battery state of charge (SoC) threshold for stopping charging, + and the battery SoC delta required to restart charging. + + nvmem-cell-names: + items: + - const: charge_limit_en + - const: charge_limit_end + - const: charge_limit_delta + patternProperties: '^connector@\d$': $ref: /schemas/connector/usb-connector.yaml# |