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authorBiju Das <biju.das@bp.renesas.com>2018-08-23 09:58:49 +0100
committerSimon Horman <horms+renesas@verge.net.au>2018-09-13 09:47:24 +0200
commita21c572ce8bc7466816ea8601d7eb0b4ca12d40c (patch)
tree76dde6b4e75de12040404be4221c0ccb40bd5c4b
parent3a3933a4fa36430a46fa7a6f9bfa7eaa19dd9dfe (diff)
arm64: dts: renesas: r8a774a1: Add INTC-EX device node
Add support for the Interrupt Controller for External Devices (INTC-EX) on RZ/G2M. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm64/boot/dts/renesas/r8a774a1.dtsi16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
index 81fba7f19d44..15d7785fb177 100644
--- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
@@ -144,6 +144,22 @@
#power-domain-cells = <1>;
};
+ intc_ex: interrupt-controller@e61c0000 {
+ compatible = "renesas,intc-ex-r8a774a1", "renesas,irqc";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0 0xe61c0000 0 0x200>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 407>;
+ power-domains = <&sysc 32>;
+ resets = <&cpg 407>;
+ };
+
hscif0: serial@e6540000 {
compatible = "renesas,hscif-r8a774a1",
"renesas,rcar-gen3-hscif",