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authorSean Christopherson <seanjc@google.com>2025-08-05 12:05:15 -0700
committerSean Christopherson <seanjc@google.com>2025-08-19 11:59:35 -0700
commitaa2e4f029341c0b56645d49cd5959946cdab31b9 (patch)
tree5a5ade327fca637024cb5a733c1e9fc0f08cead1
parentaebcbb60977323c21c8d89eb4298e454f8e89299 (diff)
KVM: x86: Unconditionally grab data from EDX:EAX in WRMSR fastpath
Always grab EDX:EAX in the WRMSR fastpath to deduplicate and simplify the case statements, and to prepare for handling immediate variants of WRMSRNS in the fastpath (the data register is explicitly provided in that case). There's no harm in reading the registers, as their values are always available, i.e. don't require VMREADs (or similarly slow operations). No real functional change intended. Cc: Xin Li <xin@zytor.com> Link: https://lore.kernel.org/r/20250805190526.1453366-8-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
-rw-r--r--arch/x86/kvm/x86.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index a5d7ab23d432..343bb38840dc 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -2157,18 +2157,16 @@ static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
{
+ u64 data = kvm_read_edx_eax(vcpu);
u32 msr = kvm_rcx_read(vcpu);
- u64 data;
bool handled;
int r;
switch (msr) {
case APIC_BASE_MSR + (APIC_ICR >> 4):
- data = kvm_read_edx_eax(vcpu);
handled = !handle_fastpath_set_x2apic_icr_irqoff(vcpu, data);
break;
case MSR_IA32_TSC_DEADLINE:
- data = kvm_read_edx_eax(vcpu);
handled = !handle_fastpath_set_tscdeadline(vcpu, data);
break;
default: