summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorSergio Paracuellos <sergio.paracuellos@gmail.com>2025-01-20 10:21:43 +0100
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>2025-02-21 18:04:31 +0100
commitacf13fc60cfa0824cafd7ce9ab0784ffc87a5d86 (patch)
tree1384354481d6e5ca5d8a21d4b0aede6659cfac14
parentc8292b002d2adf10fd47ae7dec9d610d8abe3c53 (diff)
mips: dts: ralink: rt3050: update system controller node and its consumers
Current RT3050 device tree file system controller node is wrong since it is not matching bindings. Hence, update it to match current bindings updating it also to use new introduced clock constants. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
-rw-r--r--arch/mips/boot/dts/ralink/rt3050.dtsi10
1 files changed, 8 insertions, 2 deletions
diff --git a/arch/mips/boot/dts/ralink/rt3050.dtsi b/arch/mips/boot/dts/ralink/rt3050.dtsi
index 23062333a76d..a7d9bb9bc1af 100644
--- a/arch/mips/boot/dts/ralink/rt3050.dtsi
+++ b/arch/mips/boot/dts/ralink/rt3050.dtsi
@@ -1,4 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
+#include <dt-bindings/clock/mediatek,mtmips-sysc.h>
+
/ {
#address-cells = <1>;
#size-cells = <1>;
@@ -25,9 +27,11 @@
#address-cells = <1>;
#size-cells = <1>;
- sysc@0 {
- compatible = "ralink,rt3052-sysc", "ralink,rt3050-sysc";
+ sysc: syscon@0 {
+ compatible = "ralink,rt3052-sysc", "ralink,rt3050-sysc", "syscon";
reg = <0x0 0x100>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
};
intc: intc@200 {
@@ -50,6 +54,8 @@
compatible = "ralink,rt3052-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0xc00 0x100>;
+ clocks = <&sysc RT305X_CLK_UARTLITE>;
+
interrupt-parent = <&intc>;
interrupts = <12>;