summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorStephen Boyd <swboyd@chromium.org>2022-11-07 11:15:34 -0800
committerBjorn Andersson <andersson@kernel.org>2022-11-07 21:53:06 -0600
commitaefd5370ab5e55a18c94573b9602083132e24601 (patch)
treec82808e2f05cb6ca69da49af240bc0f0a13470ea
parentf53152d1d4e6c711bb9728611bbe0b32deda36b1 (diff)
arm64: dts: qcom: sc7280: Fully describe fingerprint node on Herobrine
Update the fingerprint node on Herobrine to match the fingerprint DT binding. This will allow us to drive the reset and boot gpios from the driver when it is re-attached after flashing. We'll also be able to boot the fingerprint processor if the BIOS isn't doing it for us. Cc: Douglas Anderson <dianders@chromium.org> Cc: Matthias Kaehlcke <mka@chromium.org> Cc: Alexandru M Stan <amstan@chromium.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221107191535.624371-2-swboyd@chromium.org
-rw-r--r--arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
index ca02ef26f161..448da9794722 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
@@ -503,13 +503,16 @@ ap_spi_fp: &spi9 {
cs-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
cros_ec_fp: ec@0 {
- compatible = "google,cros-ec-spi";
+ compatible = "google,cros-ec-fp", "google,cros-ec-spi";
reg = <0>;
interrupt-parent = <&tlmm>;
interrupts = <61 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&fp_to_ap_irq_l>, <&fp_rst_l>, <&fpmcu_boot0>;
+ boot0-gpios = <&tlmm 68 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&tlmm 78 GPIO_ACTIVE_LOW>;
spi-max-frequency = <3000000>;
+ vdd-supply = <&pp3300_fp_mcu>;
};
};