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authorChao Du <duchao@eswincomputing.com>2025-02-21 02:59:29 +0000
committerAnup Patel <anup@brainfault.org>2025-03-20 11:33:56 +0530
commitb3f263a98d30fe2e33eefea297598c590ee3560e (patch)
tree36a41b1528213f8294c8c3d048c2afcf07067935
parent2d117e67f318303f6ab699a5511d1fac3f170545 (diff)
RISC-V: KVM: Optimize comments in kvm_riscv_vcpu_isa_disable_allowed
The comments for EXT_SVADE are a bit confusing. Clarify it. Signed-off-by: Chao Du <duchao@eswincomputing.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Link: https://lore.kernel.org/r/20250221025929.31678-1-duchao@eswincomputing.com Signed-off-by: Anup Patel <anup@brainfault.org>
-rw-r--r--arch/riscv/kvm/vcpu_onereg.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c
index f6d27b59c641..43ee8e33ba23 100644
--- a/arch/riscv/kvm/vcpu_onereg.c
+++ b/arch/riscv/kvm/vcpu_onereg.c
@@ -203,7 +203,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext)
case KVM_RISCV_ISA_EXT_SVADE:
/*
* The henvcfg.ADUE is read-only zero if menvcfg.ADUE is zero.
- * Svade is not allowed to disable when the platform use Svade.
+ * Svade can't be disabled unless we support Svadu.
*/
return arch_has_hw_pte_young();
default: