diff options
| author | Manikanta Mylavarapu <quic_mmanikan@quicinc.com> | 2025-09-17 15:49:00 +0400 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2025-09-17 10:35:00 -0500 |
| commit | b410d25fb349bc32132749bd2cb17aa17054287d (patch) | |
| tree | 92a89136b94d7bda4a92e52c38775f0980841fc9 | |
| parent | 6e5c4c093c7215198ea9fa83dcbc47d3f961de7a (diff) | |
arm64: dts: qcom: ipq5018: add QUP1 UART2 node
Add node to support the second UART node controller in IPQ5018.
Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://lore.kernel.org/r/20250917-ipq5018-uart2-v1-1-f8680bbf947f@outlook.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/ipq5018.dtsi | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi index 5ba33255659e..f024b3cba33f 100644 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi @@ -490,6 +490,16 @@ status = "disabled"; }; + blsp1_uart2: serial@78b0000 { + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; + reg = <0x078b0000 0x200>; + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; + status = "disabled"; + }; + blsp1_spi1: spi@78b5000 { compatible = "qcom,spi-qup-v2.2.1"; #address-cells = <1>; |