diff options
| author | Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> | 2025-08-16 17:00:20 +0300 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2025-08-23 20:48:33 -0500 |
| commit | be541b843114d5c92f89b367b51f5dfb76a99124 (patch) | |
| tree | 96a9697184c17e446adc337fca8c78227200c13d | |
| parent | d7d28bcc2038bd66a4f5912b8e1b162f5ba6faa8 (diff) | |
arm64: dts: qcom: sm6150: move standard clocks to SoC dtsi
Follow the example of all other platforms and reference standard clocks
(XO, sleep) from the SoC DT even if they are defined in the board DT
file.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250816-qcs615-move-clocks-v1-1-bc5665d6e1c3@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/qcs615-ride.dts | 14 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sm6150.dtsi | 5 |
2 files changed, 5 insertions, 14 deletions
diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/boot/dts/qcom/qcs615-ride.dts index 59582d3dc4c4..e663343df75d 100644 --- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts +++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts @@ -288,12 +288,6 @@ }; }; -&gcc { - clocks = <&rpmhcc RPMH_CXO_CLK>, - <&rpmhcc RPMH_CXO_CLK_A>, - <&sleep_clk>; -}; - &pcie { perst-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>; wake-gpios = <&tlmm 100 GPIO_ACTIVE_HIGH>; @@ -369,10 +363,6 @@ status = "okay"; }; -&rpmhcc { - clocks = <&xo_board_clk>; -}; - &tlmm { bt_en_state: bt-en-state { pins = "gpio85"; @@ -523,7 +513,3 @@ status = "okay"; }; - -&watchdog { - clocks = <&sleep_clk>; -}; diff --git a/arch/arm64/boot/dts/qcom/sm6150.dtsi b/arch/arm64/boot/dts/qcom/sm6150.dtsi index b66bc13c0b5e..69e013a17c9f 100644 --- a/arch/arm64/boot/dts/qcom/sm6150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6150.dtsi @@ -495,6 +495,9 @@ gcc: clock-controller@100000 { compatible = "qcom,qcs615-gcc"; reg = <0 0x00100000 0 0x1f0000>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&rpmhcc RPMH_CXO_CLK_A>, + <&sleep_clk>; #clock-cells = <1>; #reset-cells = <1>; @@ -3676,6 +3679,7 @@ compatible = "qcom,apss-wdt-qcs615", "qcom,kpss-wdt"; reg = <0x0 0x17c10000 0x0 0x1000>; interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&sleep_clk>; }; timer@17c20000 { @@ -3765,6 +3769,7 @@ rpmhcc: clock-controller { compatible = "qcom,qcs615-rpmh-clk"; + clocks = <&xo_board_clk>; clock-names = "xo"; #clock-cells = <1>; |