diff options
| author | Ben Zong-You Xie <ben717@andestech.com> | 2025-07-11 21:30:25 +0800 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2025-07-21 16:51:53 +0200 |
| commit | bf40c1a5b9561bef0c0d1df47bcfc0ceb26a6c8a (patch) | |
| tree | f71112cb73f9c643ff107d0d8d29f61b62ae8ffa | |
| parent | ad087c91eb87bebd79f05a4c9b5cfbe72d6186fa (diff) | |
MAINTAINERS: Add entry for Andes SoC
Add entry for Andes SoC maintainer and related files
Signed-off-by: Ben Zong-You Xie <ben717@andestech.com>
Link: https://lore.kernel.org/r/20250711133025.2192404-10-ben717@andestech.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| -rw-r--r-- | MAINTAINERS | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index c3f7fbd0d67a..69285e2f5e80 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -21285,6 +21285,15 @@ F: drivers/irqchip/irq-riscv-intc.c F: include/linux/irqchip/riscv-aplic.h F: include/linux/irqchip/riscv-imsic.h +RISC-V ANDES SoC Support +M: Ben Zong-You Xie <ben717@andestech.com> +S: Maintained +T: git: https://github.com/ben717-linux/linux +F: Documentation/devicetree/bindings/interrupt-controller/andestech,plicsw.yaml +F: Documentation/devicetree/bindings/riscv/andes.yaml +F: Documentation/devicetree/bindings/timer/andestech,plmt0.yaml +F: arch/riscv/boot/dts/andes/ + RISC-V ARCHITECTURE M: Paul Walmsley <paul.walmsley@sifive.com> M: Palmer Dabbelt <palmer@dabbelt.com> |