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| author | Bjorn Andersson <andersson@kernel.org> | 2025-08-12 10:05:32 -0500 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2025-08-12 10:05:32 -0500 |
| commit | c46d34c0441e8033b3b3eebd86d20dd15d683020 (patch) | |
| tree | 2a9eb989ae3ca91985321aa5baf219cb15cc9895 | |
| parent | f8328b7549e1faff45e32ab2ecc2573b90604e76 (diff) | |
| parent | 039a504cda2cb69354387aa453391ec89a9e0e49 (diff) | |
Merge branch '20250811-sc7280-mdss-reset-v1-1-83ceff1d48de@oss.qualcomm.com' into arm64-for-6.18
Merge the addition of reset constants to the SC7280 display clock
controller binding, so we can use it in the MDSS node.
| -rw-r--r-- | include/dt-bindings/clock/qcom,dispcc-sc7280.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/qcom,dispcc-sc7280.h b/include/dt-bindings/clock/qcom,dispcc-sc7280.h index a4a692c20acf..9f113f346be8 100644 --- a/include/dt-bindings/clock/qcom,dispcc-sc7280.h +++ b/include/dt-bindings/clock/qcom,dispcc-sc7280.h @@ -52,4 +52,8 @@ /* DISP_CC power domains */ #define DISP_CC_MDSS_CORE_GDSC 0 +/* DISPCC resets */ +#define DISP_CC_MDSS_CORE_BCR 0 +#define DISP_CC_MDSS_RSCC_BCR 1 + #endif |