diff options
| author | Oleksij Rempel <o.rempel@pengutronix.de> | 2023-01-31 09:46:35 +0100 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2023-03-06 10:01:46 +0800 |
| commit | c89614079e447824786a3064758ef7e53c3eddc3 (patch) | |
| tree | 06a2f1cfb76950a074ea03046663e0b135688103 | |
| parent | c812c91bda8d3b4d9ea23c52bf88a20de64f7487 (diff) | |
ARM: dts: imx6qdl-skov-cpu: configure ethernet reference clock parent
On this board the PHY is the ref clock provider. So, configure ethernet
reference clock as input.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl-skov-cpu.dtsi | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-skov-cpu.dtsi b/arch/arm/boot/dts/imx6qdl-skov-cpu.dtsi index 3def1b621c8e..2731faede1cb 100644 --- a/arch/arm/boot/dts/imx6qdl-skov-cpu.dtsi +++ b/arch/arm/boot/dts/imx6qdl-skov-cpu.dtsi @@ -105,6 +105,7 @@ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <50000000>; + clock-output-names = "enet_ref_pad"; }; reg_3v3: regulator-3v3 { @@ -232,13 +233,16 @@ }; }; +&clks { + clocks = <&clk50m_phy>; + clock-names = "enet_ref_pad"; + assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>; + assigned-clock-parents = <&clk50m_phy>; +}; + &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; - clocks = <&clks IMX6QDL_CLK_ENET>, - <&clks IMX6QDL_CLK_ENET>, - <&clk50m_phy>; - clock-names = "ipg", "ahb", "ptp"; phy-mode = "rmii"; phy-supply = <®_3v3>; status = "okay"; |