diff options
| author | Yu-Wei Hsu <betterman5240@gmail.com> | 2024-04-29 09:21:13 +0000 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2024-06-26 18:37:41 +0530 |
| commit | e325618349cdc1fbbe63574080249730e7cff9ea (patch) | |
| tree | 6d03fc8ca85fa152abd3280befc922baadf5f1a4 | |
| parent | da7b1b525e972b8c5b16640fa5b2ff2497b5c652 (diff) | |
RISC-V: KVM: Redirect AMO load/store access fault traps to guest
The KVM RISC-V does not delegate AMO load/store access fault traps to
VS-mode (hedeleg) so typically M-mode takes these traps and redirects
them back to HS-mode. However, upon returning from M-mode, the KVM
RISC-V running in HS-mode terminates VS-mode software.
The KVM RISC-V should redirect AMO load/store access fault traps back
to VS-mode and let the VS-mode trap handler determine the next steps.
Signed-off-by: Yu-Wei Hsu <betterman5240@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20240429092113.70695-1-betterman5240@gmail.com
Signed-off-by: Anup Patel <anup@brainfault.org>
| -rw-r--r-- | arch/riscv/kvm/vcpu_exit.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/riscv/kvm/vcpu_exit.c b/arch/riscv/kvm/vcpu_exit.c index 5761f95abb60..fa98e5c024b2 100644 --- a/arch/riscv/kvm/vcpu_exit.c +++ b/arch/riscv/kvm/vcpu_exit.c @@ -185,6 +185,8 @@ int kvm_riscv_vcpu_exit(struct kvm_vcpu *vcpu, struct kvm_run *run, case EXC_INST_ILLEGAL: case EXC_LOAD_MISALIGNED: case EXC_STORE_MISALIGNED: + case EXC_LOAD_ACCESS: + case EXC_STORE_ACCESS: if (vcpu->arch.guest_context.hstatus & HSTATUS_SPV) { kvm_riscv_vcpu_trap_redirect(vcpu, trap); ret = 1; |