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| author | Bjorn Andersson <andersson@kernel.org> | 2025-10-22 16:38:12 -0500 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2025-10-22 16:38:12 -0500 |
| commit | e3e5eb9c2fac124287363b105a3436b9921f7249 (patch) | |
| tree | 502e6157166f723938faa80ada611ea97353f2ce | |
| parent | 502099e9c832c95b485835ff58a5f735d9d956a1 (diff) | |
| parent | 2238840342af8e8d37a9355f0a2ad4285c32f854 (diff) | |
Merge branch '20250919-sm7150-dispcc-fixes-v1-1-308ad47c5fce@mainlining.org' into clk-for-6.19
Merge the DeviceTree binding update adding the MDSS rese constant for
SM7150 through a topic branch to make available in DeviceTree branch as
well.
| -rw-r--r-- | include/dt-bindings/clock/qcom,sm7150-dispcc.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/qcom,sm7150-dispcc.h b/include/dt-bindings/clock/qcom,sm7150-dispcc.h index fc1fefe8fd72..1e4e6432d506 100644 --- a/include/dt-bindings/clock/qcom,sm7150-dispcc.h +++ b/include/dt-bindings/clock/qcom,sm7150-dispcc.h @@ -53,6 +53,9 @@ #define DISPCC_SLEEP_CLK 41 #define DISPCC_SLEEP_CLK_SRC 42 +/* DISPCC resets */ +#define DISPCC_MDSS_CORE_BCR 0 + /* DISPCC GDSCR */ #define MDSS_GDSC 0 |