Merge tag 'clk-meson-v6.17-1' of https://github.com/BayLibre/clk-meson into clk-amlogic

Pull Amlogic clk driver updates from Jerome Brunet:

 - Use the auxiliary reset controller implementation in the
   Amlogic axg-audio, instead of implementing the reset
   controller in drivers/clk
 - Drop unnecessary clock controller headers for Amlogic drivers
 - Drop clock controller big regmap tables in the Amlogic drivers

* tag 'clk-meson-v6.17-1' of https://github.com/BayLibre/clk-meson:
  clk: amlogic: s4: remove unused data
  clk: amlogic: drop clk_regmap tables
  clk: amlogic: get regmap with clk_regmap_init
  clk: amlogic: remove unnecessary headers
  clk: amlogic: axg-audio: use the auxiliary reset driver
  clk: tests: add clk_hw_get_dev() and clk_hw_get_of_node() tests
  clk: tests: Make clk_register_clk_parent_data_device_driver() common
  clk: add a clk_hw helpers to get the clock device or device_node

1 files changed, 0 insertions, 9 deletions

diff --git a/drivers/clk/meson/meson8-ddr.c b/drivers/clk/meson/meson8-ddr.c
index 4b73ea244b63..1975fc3987e2 100644
--- a/drivers/clk/meson/meson8-ddr.c
+++ b/drivers/clk/meson/meson8-ddr.c
@@ -85,11 +85,6 @@ static struct clk_hw_onecell_data meson8_ddr_clk_hw_onecell_data = {
 	.num = 2,
 };
 
-static struct clk_regmap *const meson8_ddr_clk_regmaps[] = {
-	&meson8_ddr_pll_dco,
-	&meson8_ddr_pll,
-};
-
 static const struct regmap_config meson8_ddr_clkc_regmap_config = {
 	.reg_bits = 8,
 	.val_bits = 32,
@@ -113,10 +108,6 @@ static int meson8_ddr_clkc_probe(struct platform_device *pdev)
 	if (IS_ERR(regmap))
 		return PTR_ERR(regmap);
 
-	/* Populate regmap */
-	for (i = 0; i < ARRAY_SIZE(meson8_ddr_clk_regmaps); i++)
-		meson8_ddr_clk_regmaps[i]->map = regmap;
-
 	/* Register all clks */
 	for (i = 0; i < meson8_ddr_clk_hw_onecell_data.num; i++) {
 		hw = meson8_ddr_clk_hw_onecell_data.hws[i];