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| author | Mark Brown <broonie@kernel.org> | 2025-04-23 12:43:27 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2025-04-23 12:43:27 +0100 |
| commit | 382d4ee4455234b498f201c00bfc120dc38b78c3 (patch) | |
| tree | 004c6db23c33623dd9ff5adaafe2e191748a1cbf /drivers/gpu/drm/amd/amdgpu/amdgpu.h | |
| parent | 7762fdab23100514e5cb612331c96bd65126ada5 (diff) | |
| parent | e8ac7336dd62f0443a675ed80b17f0f0e6846e20 (diff) | |
regulator: max20086: Fixes chip id and enable gpio
Merge series from João Paulo Gonçalves <jpaulo.silvagoncalves@gmail.com>:
I'm working on integrating a system with a MAX20086 and noticed these
small issues in the driver: the chip ID for MAX20086 is 0x30 and not
0x40. Also, in my use case, the enable pin is always enabled by
hardware, so the enable GPIO isn't needed. Without these changes, the
driver fails to probe.
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu.h')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 6d83ccfa42ee..2c04ae133848 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -353,7 +353,6 @@ enum amdgpu_kiq_irq { AMDGPU_CP_KIQ_IRQ_DRIVER0 = 0, AMDGPU_CP_KIQ_IRQ_LAST }; -#define SRIOV_USEC_TIMEOUT 1200000 /* wait 12 * 100ms for SRIOV */ #define MAX_KIQ_REG_WAIT 5000 /* in usecs, 5ms */ #define MAX_KIQ_REG_BAILOUT_INTERVAL 5 /* in msecs, 5ms */ #define MAX_KIQ_REG_TRY 1000 |