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author | Fangyu Yu <fangyu.yu@linux.alibaba.com> | 2025-08-07 15:07:29 +0800 |
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committer | Anup Patel <anup@brainfault.org> | 2025-08-25 10:26:16 +0530 |
commit | 9bca8be646e043d1fc6cd426fef05558c02de3df (patch) | |
tree | b93f20136878834864d6c3aca7ca11c66b9e63fe /drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | |
parent | 1b237f190eb3d36f52dffe07a40b5eb210280e00 (diff) |
RISC-V: KVM: Fix pte settings within kvm_riscv_gstage_ioremap()
Currently, kvm_riscv_gstage_ioremap() is used to map IMSIC gpa to the
spa of IMSIC guest interrupt file.
The PAGE_KERNEL_IO property includes global setting whereas it does not
include user mode settings, so when accessing the IMSIC address in the
virtual machine, a guest page fault will occur, this is not expected.
According to the RISC-V Privileged Architecture Spec, for G-stage address
translation, all memory accesses are considered to be user-level accesses
as though executed in U-mode.
Fixes: 659ad6d82c31 ("RISC-V: KVM: Use PAGE_KERNEL_IO in kvm_riscv_gstage_ioremap()")
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Reviewed-by: Radim Krčmář <rkrcmar@ventanamicro.com>
Reviewed-by: Nutty Liu <nutty.liu@hotmail.com>
Link: https://lore.kernel.org/r/20250807070729.89701-1-fangyu.yu@linux.alibaba.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c')
0 files changed, 0 insertions, 0 deletions