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authorJohn David Anglin <dave.anglin@bell.net>2025-07-25 12:12:14 -0400
committerHelge Deller <deller@gmx.de>2025-07-25 22:45:24 +0200
commitf6334f4ae9a4e962ba74b026e1d965dfdf8cbef8 (patch)
tree59a00bff8c79d19a9e4e4ec12c63ae9b14f91d64 /drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
parent4eab1c27ce1f0e89ab67b01bf1e4e4c75215708a (diff)
parisc: Revise gateway LWS calls to probe user read access
We use load and stbys,e instructions to trigger memory reference interruptions without writing to memory. Because of the way read access support is implemented, read access interruptions are only triggered at privilege levels 2 and 3. The kernel and gateway page execute at privilege level 0, so this code never triggers a read access interruption. Thus, it is currently possible for user code to execute a LWS compare and swap operation at an address that is read protected at privilege level 3 (PRIV_USER). Fix this by probing read access rights at privilege level 3 and branching to lws_fault if access isn't allowed. Signed-off-by: John David Anglin <dave.anglin@bell.net> Signed-off-by: Helge Deller <deller@gmx.de> Cc: stable@vger.kernel.org # v5.12+
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c')
0 files changed, 0 insertions, 0 deletions