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authorMauro Carvalho Chehab <mchehab@redhat.com>2013-04-30 09:00:33 -0300
committerMauro Carvalho Chehab <mchehab@redhat.com>2013-04-30 09:00:33 -0300
commitaad797c89903d570c17f6affc770eb98afd74e62 (patch)
treebddefd4242b0efba1068b5260f831c2697ba4037 /drivers/gpu/drm/i915/intel_i2c.c
parentc95789ecd5a979fd718ae09763df3fa50dd97a91 (diff)
parentc1be5a5b1b355d40e6cf79cc979eb66dafa24ad1 (diff)
Merge tag 'v3.9' into v4l_for_linus
Linux 3.9 * tag 'v3.9': (1099 commits) Linux 3.9 vm: add no-mmu vm_iomap_memory() stub efivars: only check for duplicates on the registered list TTY: fix atime/mtime regression aio: fix possible invalid memory access when DEBUG is enabled parisc: use spin_lock_irqsave/spin_unlock_irqrestore for PTE updates parisc: disable -mlong-calls compiler option for kernel modules parisc: uaccess: fix compiler warnings caused by __put_user casting parisc: Change kunmap macro to static inline function parisc: Provide __ucmpdi2 to resolve undefined references in 32 bit builds. sparc64: Fix missing put_cpu_var() in tlb_batch_add_one() when not batching. Revert "gpio: pxa: set initcall level to module init" efi: Check EFI revision in setup_efi_vars x86, efi: Fix a build warning Revert "MIPS: page.h: Provide more readable definition for PAGE_MASK." kernel/hz.bc: ignore. Linux 3.9-rc8 events: Protect access via task_subsys_state_check() net: fix incorrect credentials passing x86, microcode: Verify the family before dispatching microcode patching ...
Diffstat (limited to 'drivers/gpu/drm/i915/intel_i2c.c')
-rw-r--r--drivers/gpu/drm/i915/intel_i2c.c11
1 files changed, 10 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index acf8aec9ada7..ef4744e1bf0b 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -203,7 +203,13 @@ intel_gpio_setup(struct intel_gmbus *bus, u32 pin)
algo->data = bus;
}
-#define HAS_GMBUS_IRQ(dev) (INTEL_INFO(dev)->gen >= 4)
+/*
+ * gmbus on gen4 seems to be able to generate legacy interrupts even when in MSI
+ * mode. This results in spurious interrupt warnings if the legacy irq no. is
+ * shared with another device. The kernel then disables that interrupt source
+ * and so prevents the other device from working properly.
+ */
+#define HAS_GMBUS_IRQ(dev) (INTEL_INFO(dev)->gen >= 5)
static int
gmbus_wait_hw_status(struct drm_i915_private *dev_priv,
u32 gmbus2_status,
@@ -214,6 +220,9 @@ gmbus_wait_hw_status(struct drm_i915_private *dev_priv,
u32 gmbus2 = 0;
DEFINE_WAIT(wait);
+ if (!HAS_GMBUS_IRQ(dev_priv->dev))
+ gmbus4_irq_en = 0;
+
/* Important: The hw handles only the first bit, so set only one! Since
* we also need to check for NAKs besides the hw ready/idle signal, we
* need to wake up periodically and check that ourselves. */