diff options
| author | Judith Mendez <jm@ti.com> | 2024-03-20 17:38:32 -0500 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2024-04-02 12:21:39 +0200 |
| commit | d465234493bb6ad1b9c10a0c9ef9881b8d85081a (patch) | |
| tree | aecd4ec80374a6d3bb3691e1ca59925650755a14 /drivers/infiniband/hw/ionic/ionic_datapath.c | |
| parent | 6231d99dd4119312ad41abf9383e18fec66cbe4b (diff) | |
mmc: sdhci_am654: Write ITAPDLY for DDR52 timing
For DDR52 timing, DLL is enabled but tuning is not carried
out, therefore the ITAPDLY value in PHY CTRL 4 register is
not correct. Fix this by writing ITAPDLY after enabling DLL.
Fixes: a161c45f2979 ("mmc: sdhci_am654: Enable DLL only for some speed modes")
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20240320223837.959900-3-jm@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/infiniband/hw/ionic/ionic_datapath.c')
0 files changed, 0 insertions, 0 deletions