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authorBinbin Zhou <zhoubinbin@loongson.cn>2025-09-04 21:06:35 +0800
committerMiquel Raynal <miquel.raynal@bootlin.com>2025-09-10 10:56:09 +0200
commit7ad5bdf88d7295c295a363a5daf481b283acedc2 (patch)
tree78be82c5285a51b1a9daed7f6be3264249e44e19 /drivers/infiniband/hw/ionic/ionic_queue.c
parentfb1dd6b6722b5187a4fa7385d0be60b28c0f9936 (diff)
mtd: rawnand: loongson: Add nand chip select support
The page address register describes the page address of the starting address for NAND read/write/erase operations. According to the manual, it consists of two parts: {chip select, page number} The `chip select` is fixed at 2 bits, and the `page number` is determined based on the actual capacity of the single-chip memory. Therefore we need to determine the `chip select` bits base on the `page number`. For example, for a 1GB capacity chip (2K page size), it has 1M pages. Thus, [19:0] is used to represent the page number, and [21:20] represents the chip select. Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Diffstat (limited to 'drivers/infiniband/hw/ionic/ionic_queue.c')
0 files changed, 0 insertions, 0 deletions