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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2021-04-28 16:10:33 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2021-04-28 16:10:33 -0700 |
| commit | d8201efe75e13146ebde433745c7920e15593baf (patch) | |
| tree | 3e5e48dc4e5b0ce2c513b50c65f5d449721244bd /drivers/mailbox/bcm-flexrm-mailbox.c | |
| parent | c969f2451b5343a01635d35542f48bc14b44f6b3 (diff) | |
| parent | 2335f556b3afadbee6548456f543f53ac3d1af42 (diff) | |
Merge tag 'mailbox-v5.13' of git://git.linaro.org/landing-teams/working/fujitsu/integration
Pull mailbox updates from Jassi Brar:
"qcom:
- enable support for SM8350 and SC7280
sprd:
- refcount channel usage
- specify interrupt names in dt
- support sc9863a
arm:
- drop redundant print
ti:
- convert dt-bindings to json schema
and misc spelling fixes"
* tag 'mailbox-v5.13' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
dt-bindings: mailbox: qcom-ipcc: Add compatible for SC7280
dt-bindings: mailbox: ti,secure-proxy: Convert to json schema
mailbox: arm_mhu_db: Remove redundant dev_err call in mhu_db_probe()
mailbox: sprd: Add supplementary inbox support
dt-bindings: mailbox: Add interrupt-names to SPRD mailbox
mailbox: sprd: Introduce refcnt when clients requests/free channels
MAINTAINERS: Add DT bindings directory to mailbox
mailbox: fix various typos in comments
mailbox: pcc: fix platform_no_drv_owner.cocci warnings
dt-bindings: mailbox: Add compatible for SM8350 IPCC
Diffstat (limited to 'drivers/mailbox/bcm-flexrm-mailbox.c')
| -rw-r--r-- | drivers/mailbox/bcm-flexrm-mailbox.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/mailbox/bcm-flexrm-mailbox.c b/drivers/mailbox/bcm-flexrm-mailbox.c index bee33abb5308..b4f33dc399a0 100644 --- a/drivers/mailbox/bcm-flexrm-mailbox.c +++ b/drivers/mailbox/bcm-flexrm-mailbox.c @@ -423,7 +423,7 @@ static void flexrm_enqueue_desc(u32 nhpos, u32 nhcnt, u32 reqid, * * In general use, number of non-HEADER descriptors can easily go * beyond 31. To tackle this situation, we have packet (or request) - * extenstion bits (STARTPKT and ENDPKT) in the HEADER descriptor. + * extension bits (STARTPKT and ENDPKT) in the HEADER descriptor. * * To use packet extension, the first HEADER descriptor of request * (or packet) will have STARTPKT=1 and ENDPKT=0. The intermediate @@ -1095,7 +1095,7 @@ static int flexrm_process_completions(struct flexrm_ring *ring) /* * Get current completion read and write offset * - * Note: We should read completion write pointer atleast once + * Note: We should read completion write pointer at least once * after we get a MSI interrupt because HW maintains internal * MSI status which will allow next MSI interrupt only after * completion write pointer is read. |