diff options
| author | Takashi Iwai <tiwai@suse.de> | 2010-12-13 09:28:43 +0100 |
|---|---|---|
| committer | Takashi Iwai <tiwai@suse.de> | 2010-12-13 09:28:43 +0100 |
| commit | 20aeeb356ba2e8daa99b5942c528ae2b3ea28433 (patch) | |
| tree | d2cebc7039954851998d592123899f5627def7a9 /drivers/pci/quirks.c | |
| parent | 07a9e2b2fbdda631eeff54e4b8ebcaaea71be538 (diff) | |
| parent | 5b84ba26a9672e615897234fa5efd3eea2d6b295 (diff) | |
Merge branch 'topic/workq-update' into topic/asoc
Conflicts:
sound/soc/codecs/wm8350.c
sound/soc/codecs/wm8753.c
sound/soc/sh/fsi.c
sound/soc/soc-core.c
Diffstat (limited to 'drivers/pci/quirks.c')
| -rw-r--r-- | drivers/pci/quirks.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index f5c63fe9db5c..6f9350cabbd5 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -2136,6 +2136,24 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82865_HB, DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82875_HB, quirk_unhide_mch_dev6); +#ifdef CONFIG_TILE +/* + * The Tilera TILEmpower platform needs to set the link speed + * to 2.5GT(Giga-Transfers)/s (Gen 1). The default link speed + * setting is 5GT/s (Gen 2). 0x98 is the Link Control2 PCIe + * capability register of the PEX8624 PCIe switch. The switch + * supports link speed auto negotiation, but falsely sets + * the link speed to 5GT/s. + */ +static void __devinit quirk_tile_plx_gen1(struct pci_dev *dev) +{ + if (tile_plx_gen1) { + pci_write_config_dword(dev, 0x98, 0x1); + mdelay(50); + } +} +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8624, quirk_tile_plx_gen1); +#endif /* CONFIG_TILE */ #ifdef CONFIG_PCI_MSI /* Some chipsets do not support MSI. We cannot easily rely on setting |