diff options
| author | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2021-05-26 09:40:54 -0400 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2021-05-26 09:40:54 -0400 |
| commit | abfe041de01f16d74df522d92cf5e3f6523971dd (patch) | |
| tree | 1cd997085149cf09e110baa4f98725ed18ffa05a /include/drm/drm_dp_mst_helper.h | |
| parent | 7bc188cc2c8c7b21bfa0782f0d22bbf245ce1f63 (diff) | |
| parent | 9a91e5e0af5e03940d0eec72c36364a1701de240 (diff) | |
Merge drm/drm-next into drm-intel-next
Getting in sync with -rc2
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'include/drm/drm_dp_mst_helper.h')
| -rw-r--r-- | include/drm/drm_dp_mst_helper.h | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h index bd1c39907b92..c87a829b6498 100644 --- a/include/drm/drm_dp_mst_helper.h +++ b/include/drm/drm_dp_mst_helper.h @@ -594,6 +594,14 @@ struct drm_dp_mst_topology_mgr { */ int max_payloads; /** + * @max_lane_count: maximum number of lanes the GPU can drive. + */ + u8 max_lane_count; + /** + * @max_link_rate: maximum link rate per lane GPU can output. + */ + u8 max_link_rate; + /** * @conn_base_id: DRM connector ID this mgr is connected to. Only used * to build the MST connector path value. */ @@ -765,7 +773,9 @@ struct drm_dp_mst_topology_mgr { int drm_dp_mst_topology_mgr_init(struct drm_dp_mst_topology_mgr *mgr, struct drm_device *dev, struct drm_dp_aux *aux, int max_dpcd_transaction_bytes, - int max_payloads, int conn_base_id); + int max_payloads, + u8 max_lane_count, u8 max_link_rate, + int conn_base_id); void drm_dp_mst_topology_mgr_destroy(struct drm_dp_mst_topology_mgr *mgr); @@ -783,7 +793,8 @@ drm_dp_mst_detect_port(struct drm_connector *connector, struct edid *drm_dp_mst_get_edid(struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port); -int drm_dp_get_vc_payload_bw(int link_rate, int link_lane_count); +int drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr, + int link_rate, int link_lane_count); int drm_dp_calc_pbn_mode(int clock, int bpp, bool dsc); |