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| author | Yifan Zha <Yifan.Zha@amd.com> | 2022-09-07 14:13:02 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-10-18 14:52:06 -0400 |
| commit | 7e2c58320ed59c9326e82cf9c00090f6a912fb64 (patch) | |
| tree | 28af081efa42382cce3e553a5f7d5e1c1d0f547c /lib/mpi/mpi-sub-ui.c | |
| parent | b3372fa74d2a7f840bea706607ee2224dfd24039 (diff) | |
drm/amdgpu: Program GC registers through RLCG interface in gfx_v11/gmc_v11
[Why]
L1 blocks most of GC registers accessing by MMIO.
[How]
Use RLCG interface to program GC registers under SRIOV VF in full access time.
Signed-off-by: Yifan Zha <Yifan.Zha@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'lib/mpi/mpi-sub-ui.c')
0 files changed, 0 insertions, 0 deletions