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authorLinus Walleij <linus.walleij@linaro.org>2025-05-12 14:05:58 +0200
committerFlorian Fainelli <florian.fainelli@broadcom.com>2025-06-09 10:10:29 -0700
commit16d27d638f3bb389f243fa469db9dd2a0aa72d83 (patch)
treeb612fc07b22554b4bf6e2e3854eea4a537cab365 /net/lapb/lapb_timer.c
parentd84e3949940baa3105098f74449ff3c97b2d85e1 (diff)
ARM64: dts: bcm63158: Add BCMBCA peripherals
All the BCMBCA SoCs share a set of peripherals at 0xff800000, albeit at slightly varying memory locations on the bus and with varying IRQ assignments. Add the watchdog, GPIO blocks, RNG, LED, second UART and DMA blocks for the BCM63158 based on the vendor files 63158_map_part.h and 63158_intr.h from the "bcmopen-consumer" code drop. The DTSI file has clearly been authored for the B0 revision of the SoC: there is an earlier A0 version, but this has the UARTs in the legacy PERF memory space, while the B0 has opened a new peripheral window at 0xff812000 for the three UARTs. It also has a designated AHB peripheral area at 0xff810000 where the DMA resides, the peripheral range window fits these two peripheral groups. This SoC has up to 256 possible GPIOs due to having 8 registers with 32 GPIOs in each available. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20250512-bcmbca-peripherals-arm-v3-12-86f97ab4326f@linaro.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
Diffstat (limited to 'net/lapb/lapb_timer.c')
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