diff options
author | Tim Harvey <tharvey@gateworks.com> | 2025-07-07 13:17:00 -0700 |
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committer | Shawn Guo <shawnguo@kernel.org> | 2025-07-11 16:34:33 +0800 |
commit | 2ef45ff68c985e3312a141deece2eeaab1f7ada0 (patch) | |
tree | 6a5401d78b75909acdbc2767cbeec8f8be86c6ec /net/lapb/lapb_timer.c | |
parent | abc467727773996f40e9eacb963ae9f441db40be (diff) |
arm64: dts: imx8mn-venice-gw7902: Increase HS400 USDHC clock speed
The IMX8M reference manuals indicate in the USDHC Clock generator section
that the clock rate for DDR is 1/2 the input clock therefore HS400 rates
clocked at 200Mhz require a 400Mhz SDHC clock.
This showed about a 1.5x improvement in read performance for the eMMC's
used on the various imx8m{m,n,p}-venice boards.
Fixes: ef484dfcf6f7 ("arm64: dts: imx: Add i.mx8mm/imx8mn Gateworks gw7902 dts support")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'net/lapb/lapb_timer.c')
0 files changed, 0 insertions, 0 deletions