diff options
| author | Wadim Egorov <w.egorov@phytec.de> | 2025-05-21 07:33:39 +0200 |
|---|---|---|
| committer | Vignesh Raghavendra <vigneshr@ti.com> | 2025-06-21 22:17:28 +0530 |
| commit | 945e48a39c957924bc84d1a6c137da039e13855b (patch) | |
| tree | a8ffddc0c4c89343603b9a9ffcafa0fe34cb83fc /net/lapb/lapb_timer.c | |
| parent | 19272b37aa4f83ca52bdf9c16d5d81bdd1354494 (diff) | |
arm64: dts: ti: k3-am642-phyboard-electra: Fix PRU-ICSSG Ethernet ports
For the ICSSG PHYs to operate correctly, a 25 MHz reference clock must
be supplied on CLKOUT0. Previously, our bootloader configured this
clock, which is why the PRU Ethernet ports appeared to work, but the
change never made it into the device tree.
Add clock properties to make EXT_REFCLK1.CLKOUT0 output a 25MHz clock.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Fixes: 87adfd1ab03a ("arm64: dts: ti: am642-phyboard-electra: Add PRU-ICSSG nodes")
Link: https://lore.kernel.org/r/20250521053339.1751844-1-w.egorov@phytec.de
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Diffstat (limited to 'net/lapb/lapb_timer.c')
0 files changed, 0 insertions, 0 deletions