diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2025-07-21 17:01:43 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2025-07-21 17:01:43 +0200 |
| commit | 9a5a531d1cb8796243fbbaf35cff1d2ea8d72c3a (patch) | |
| tree | a990cf4981456392d79b1710aab09b21cfa0f4f1 /net/lapb/lapb_timer.c | |
| parent | 31e91dfc7fba0bd6d27358865a05a878145469d7 (diff) | |
| parent | 1c15e359ba53b297ba5fd72bbf626ede72c3de3e (diff) | |
Merge tag 'aspeed-6.17-devicetree-1' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux into soc/dt
ASPEED devicetree updates for 6.17
Removed platforms:
- IBM's Swift BMC
New platforms:
- Meta's Santabarbara
Santabarbara is a compute node with an accelerator module
- NVIDIA's GB200NVL BMC
NVIDIA GB200 NVL72 connects 36 Grace CPUs and 72 Blackwell GPUs in an NVIDIA
NVLink-connected, liquid-cooled, rack-scale design.
Updated BMC platforms:
- Bletchley (Meta): GPIO hog names, remove ethernet-phy node, USB PD negotiation
- Catalina (Meta): Various sensors added, MCTP support for NIC management
- Harma (Meta): Various sensors added
- System1 (IBM): IPMB and various GPIO-related updates
- Yosemite4 (Meta): GPIO names for UART mux select lines
The System1 series includes a devicetree binding patch for IPMI IPMB devices.
* tag 'aspeed-6.17-devicetree-1' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux: (34 commits)
ARM: dts: aspeed: yosemite4: add gpio name for uart mux sel
ARM: dts: aspeed: santabarbara: Add Meta Santabarbara BMC
dt-bindings: arm: aspeed: add Meta Santabarbara board
ARM: dts: aspeed: bletchley: enable USB PD negotiation
ARM: dts: aspeed: lanyang: Fix 'lable' typo in LED nodes
ARM: dts: aspeed: harma: add mmc health
ARM: dts: aspeed: Harma: revise gpio bride pin for battery
ARM: dts: aspeed: harma: add ADC128D818 for voltage monitoring
ARM: dts: aspeed: harma: add fan board I/O expander
ARM: dts: aspeed: harma: add E1.S power monitor
ARM: dts: aspeed: catalina: Enable MCTP for frontend NIC management
ARM: dts: aspeed: Add device tree for Nvidia's GB200NVL BMC
dt-bindings: arm: aspeed: add Nvidia's GB200NVL BMC
ARM: dts: aspeed: catalina: Enable MCTP support for NIC management
ARM: dts: aspeed: catalina: Update CBC FRU EEPROM I2C bus and address
ARM: dts: aspeed: catalina: Enable multi-master on additional I2C buses
ARM: dts: aspeed: catalina: Remove INA238 and INA230 nodes
ARM: dts: aspeed: catalina: Add second source HSC node support
ARM: dts: aspeed: catalina: Add second source fan controller support
ARM: dts: aspeed: catalina: Add fan controller support
...
Link: https://lore.kernel.org/r/36d50489cac1fbae01ec699b742f6c6c459a01cb.camel@codeconstruct.com.au
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'net/lapb/lapb_timer.c')
0 files changed, 0 insertions, 0 deletions