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authorSuzuki K Poulose <suzuki.poulose@arm.com>2021-02-01 11:13:37 -0700
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2021-02-04 17:00:33 +0100
commit1d3eead7e9fba77c310e07d5e296d044abd704eb (patch)
tree072036a021d81ef2e6cda288e11cf07cec601245 /net/lapb
parent33d5573a15c2a6f91ca0ef2ab28076be6a2a4a2d (diff)
coresight: etm4x: Cleanup secure exception level masks
We rely on the ETM architecture version to decide whether Secure EL2 is available on the CPU for excluding the level for address comparators and viewinst main control register. We must instead use the TRCDIDR3.EXLEVEL_S field to detect the supported levels. Link: https://lore.kernel.org/r/20210110224850.1880240-16-suzuki.poulose@arm.com Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20210201181351.1475223-18-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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