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authorLouis-Alexis Eyraud <louisalexis.eyraud@collabora.com>2025-05-09 12:12:49 +0200
committerSteven Price <steven.price@arm.com>2025-06-20 15:49:14 +0100
commitbd77b870eb190c9cf5d9b7208625513e99e5be2d (patch)
tree7f986e0ce277361dd62625091d5ddf1c4943c17b /rust/helpers/build_assert.c
parent6905b0d9813176087fc0f28bc5e4ee2b86e6ce13 (diff)
drm/panfrost: Commonize Mediatek power domain array definitions
In the panfrost driver, the platform data of several Mediatek SoC declares and uses several different power domains arrays according to GPU core number present in the SoC: - mediatek_mt8186_pm_domains (2 cores) - mediatek_mt8183_pm_domains (3 cores) - mediatek_mt8192_pm_domains (5 cores) As they all are fixed arrays, starting with the same entries and the platform data also has a power domains array length field (num_pm_domains), they can be replaced by a single array, containing all entries, if the num_pm_domains field of the platform data is also set to the matching core number. So, create a generic power domain array (mediatek_pm_domains) and use it in the mt8183(b), mt8186, mt8188 and mt8192 platform data instead. Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com> Reviewed-by: Steven Price <steven.price@arm.com> Signed-off-by: Steven Price <steven.price@arm.com> Link: https://lore.kernel.org/r/20250509-mt8370-enable-gpu-v6-3-2833888cb1d3@collabora.com
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