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authorThomas Richard <thomas.richard@bootlin.com>2025-08-11 15:25:44 +0200
committerBartosz Golaszewski <bartosz.golaszewski@linaro.org>2025-08-11 15:39:31 +0200
commit181fe022ecf8a8e85def0e94852c631c59a8b3f6 (patch)
treee8bd774a8981412c4ddc2ef85303f94b56154662 /rust/helpers/build_bug.c
parent8f5ae30d69d7543eee0d70083daf4de8fe15d585 (diff)
gpiolib: add support to register sparse pin range
Add support to register for GPIO<->pin mapping using a list of non consecutive pins. The core already supports sparse pin range (pins member of struct pinctrl_gpio_range), but it was not possible to register one. If pins is not NULL the core uses it, otherwise it assumes that a consecutive pin range was registered and it uses pin_base. The function gpiochip_add_pin_range() which allocates and fills the struct pinctrl_gpio_range was renamed to gpiochip_add_pin_range_with_pins() and the pins parameter was added. Two new functions were added, gpiochip_add_pin_range() and gpiochip_add_sparse_pin_range() to register a consecutive or sparse pins range. Both use gpiochip_add_pin_range_with_pins(). Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Thomas Richard <thomas.richard@bootlin.com> Link: https://lore.kernel.org/r/20250811-aaeon-up-board-pinctrl-support-v9-1-29f0cbbdfb30@bootlin.com Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Diffstat (limited to 'rust/helpers/build_bug.c')
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