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authorTimur Kristóf <timur.kristof@gmail.com>2025-08-28 17:11:05 +0200
committerAlex Deucher <alexander.deucher@amd.com>2025-09-02 15:55:04 -0400
commit813d13524a3bdcc5f0253e06542440ca74c2653a (patch)
tree9008d69ce1b6cdd45b3cae9185ccd2360c88e3cb /rust/helpers/build_bug.c
parent3a0c3a4035f995e1f993dfaf4d63dc19e9b4bc1c (diff)
drm/amd/pm: Increase SMC timeout on SI and warn (v3)
The SMC can take an excessive amount of time to process some messages under some conditions. Background: Sending a message to the SMC works by writing the message into the mmSMC_MESSAGE_0 register and its optional parameter into the mmSMC_SCRATCH0, and then polling mmSMC_RESP_0. Previously the timeout was AMDGPU_MAX_USEC_TIMEOUT, ie. 100 ms. Increase the timeout to 200 ms for all messages and to 1 sec for a few messages which I've observed to be especially slow: PPSMC_MSG_NoForcedLevel PPSMC_MSG_SetEnabledLevels PPSMC_MSG_SetForcedLevels PPSMC_MSG_DisableULV PPSMC_MSG_SwitchToSwState This fixes the following problems on Tahiti when switching from a lower clock power state to a higher clock state, such as when DC turns on a display which was previously turned off. * si_restrict_performance_levels_before_switch would fail (if the user previously forced high clocks using sysfs) * si_set_sw_state would fail (always) It turns out that both of those failures were SMC timeouts and that the SMC actually didn't fail or hang, just needs more time to process those. Add a warning when there is an SMC timeout to make it easier to identify this type of problem in the future. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'rust/helpers/build_bug.c')
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