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authorMiquel Raynal <miquel.raynal@bootlin.com>2025-07-31 18:52:16 +0200
committerMiquel Raynal <miquel.raynal@bootlin.com>2025-07-31 18:52:16 +0200
commit9cf9db888f387844e063efc6296e9fa5c042995e (patch)
tree6c0cea7ecc9f06c93194ec80551e98e07871e3d7 /rust/helpers/cpu.c
parent3dd8aa0ef78e4941f4b915d317616c03d08e31b2 (diff)
parentfb2fae70e7e985c4acb1ad96110d8b98bb64a87c (diff)
Merge tag 'nand/for-6.17' into mtd/next
* Raw NAND changes: Various controller drivers received minor fixes like DMA mapping checks, better timing derivations or bitflip statistics. It has also been discovered that some Hynix NAND flashes were not supporting read-retries, which is not properly supported. * SPI NAND changes: In order to support high-speed modes, certain chips need extra configuration like adding more dummy cycles. This is now possible, especially on Winbond chips. Aside from that, Gigadevice gets support for a new chip (GD5F1GM9). Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Diffstat (limited to 'rust/helpers/cpu.c')
-rw-r--r--rust/helpers/cpu.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/rust/helpers/cpu.c b/rust/helpers/cpu.c
new file mode 100644
index 000000000000..824e0adb19d4
--- /dev/null
+++ b/rust/helpers/cpu.c
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <linux/smp.h>
+
+unsigned int rust_helper_raw_smp_processor_id(void)
+{
+ return raw_smp_processor_id();
+}