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| author | Mark Brown <broonie@kernel.org> | 2025-04-30 23:33:59 +0900 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2025-04-30 23:33:59 +0900 |
| commit | a7f035c2c72496cf7ac34bfaa8c289e0d4c45836 (patch) | |
| tree | 1962110083a27f50a6b0f08d44e6f225e6bd7cbd /rust/helpers/helpers.c | |
| parent | df8c5ad0f56635341bfe3f59ef7c6473e389abc4 (diff) | |
| parent | e6702c44c2adb28b62f81de498e9b1e4562ce660 (diff) | |
spi: axi-spi-engine: offload instruction optimization
Merge series from David Lechner <dlechner@baylibre.com>:
In order to achieve a 4 MSPS rate on a 16-bit ADC with a 80 MHz SCLK
using the SPI offload feature of the AXI SPI Engine, we need to shave
off some time that is spent executing unnecessary instructions. There
are a few one-time setup instructions that can be moved so that they
execute only once when the SPI offload trigger is enabled rather than
repeating each time the offload is triggered. Additionally, a recent
change to the IP block allows dropping the SYNC instruction completely.
With these changes, we are left with only the 3 instructions that are
needed to to assert CS, transfer the data, and deassert CS. This makes
3 + 16 * 12.5 ns = 237.5 ns < 250 ns which is comfortably within the
available time period.
Diffstat (limited to 'rust/helpers/helpers.c')
| -rw-r--r-- | rust/helpers/helpers.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/rust/helpers/helpers.c b/rust/helpers/helpers.c index e1c21eba9b15..1e7c84df7252 100644 --- a/rust/helpers/helpers.c +++ b/rust/helpers/helpers.c @@ -14,6 +14,7 @@ #include "cpumask.c" #include "cred.c" #include "device.c" +#include "dma.c" #include "err.c" #include "fs.c" #include "io.c" |