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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2025-10-14 10:50:20 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2025-10-14 10:50:20 +0200 |
| commit | daa5a9bc67f31b77649d885cf5f64d542c0524fd (patch) | |
| tree | 509b76d68ec09a0c9eb92a33ac7b04cdb82ad7f2 /rust/helpers/helpers.c | |
| parent | 6a636d203cc8d29ae73116bbca8b0ea2c7a90d7f (diff) | |
| parent | c510368bce39cbaf4cb66f4acf788f5efa8692a6 (diff) | |
Merge tag 'renesas-r9a09g047-dt-binding-defs-tag5' into renesas-clk-for-v6.19
Renesas RZ/G3E USB2 PHY Core Clock DT Binding Definitions
USB2 PHY core clock DT binding definitions for the Renesas RZ/G3E
(R9A09G047) SoC, shared by driver and DT source files.
Diffstat (limited to 'rust/helpers/helpers.c')
0 files changed, 0 insertions, 0 deletions