diff options
| author | Dillon Varone <Dillon.Varone@amd.com> | 2025-08-14 12:01:15 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2025-08-27 13:57:50 -0400 |
| commit | 6b34e7ed4ba583ee77032a4c850ff97ba16ad870 (patch) | |
| tree | 91ee1808d01fbd8381f8a31439188d4bfafea057 /rust/helpers/pci.c | |
| parent | bdbb6a14db574677254cb7846a3774f5fc57e549 (diff) | |
drm/amd/display: Consider sink max slice width limitation for dsc
[WHY&HOW]
The sink max slice width limitation should be considered for DSC, but
was removed in "refactor DSC cap calculations".
This patch adds it back and takes the valid minimum between the sink and
source.
Signed-off-by: Dillon Varone <Dillon.Varone@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'rust/helpers/pci.c')
0 files changed, 0 insertions, 0 deletions