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author | Ghennadi Procopciuc <Ghennadi.Procopciuc@nxp.com> | 2025-08-12 22:00:36 +0200 |
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committer | Uwe Kleine-König <ukleinek@kernel.org> | 2025-09-15 11:39:45 +0200 |
commit | d8af3812b1e8b3b02bdac2f74eda1463540edd61 (patch) | |
tree | 0a6d81ee39b6be00131fcd164216b59c40042c78 /rust/helpers/processor.c | |
parent | 3513752cfe6fc1cfb0d99b3b4c554eb56e8bf8a1 (diff) |
pwm: Add the S32G support in the Freescale FTM driver
The Automotive S32G2 and S32G3 platforms include two FTM timers for
pwm. Each FTM has 6 PWM channels.
The current Freescale FTM driver supports the iMX8 and the Vybrid
Family FTM IP. The FTM IP found on the S32G platforms is almost
identical except for the number of channels and the register mapping.
These changes allow to deal with different number of channels and
support the holes found in the register memory mapping for s32gx for
suspend / resume. The fault register does not exist on the s32gx and
at resume time all the mapping is wrote back leading to a kernel
crash.
/* restore all registers from cache */
regcache_cache_only(fpc->regmap, false);
regcache_sync(fpc->regmap);
The regmap callbacks 'writeable_reg()' and 'readable_reg()' will skip
the address corresponding to a register which is not present.
Tested on a s32g274-rdb2 J5 PWM pin output with signal visualization
on oscilloscope.
Signed-off-by: Ghennadi Procopciuc <Ghennadi.Procopciuc@nxp.com>
Co-developed-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20250812200036.3432917-3-daniel.lezcano@linaro.org
Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
Diffstat (limited to 'rust/helpers/processor.c')
0 files changed, 0 insertions, 0 deletions