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| author | Gabor Juhos <j4g8y7@gmail.com> | 2025-07-02 14:35:23 +0200 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2025-07-02 17:02:42 +0100 |
| commit | 0dc7e656ddd54c3267b7cc18c1ac8ec1297ed02f (patch) | |
| tree | a2516314e0cf03ea17a7d3b09c1a7fbf71f0ac1a /rust/helpers/workqueue.c | |
| parent | d2c0e95525216cdc695d0066ee2f70b8adfbc536 (diff) | |
mtd: nand: qpic-common: add defines for ECC_MODE values
Add defines for the values of the ECC_MODE field of the NAND_DEV0_ECC_CFG
register and change both the 'qcom-nandc' and 'spi-qpic-snand' drivers to
use those instead of magic numbers.
No functional changes. This is in preparation for adding 8 bit ECC strength
support for the 'spi-qpic-snand' driver.
Reviewed-by: Md Sadre Alam <quic_mdalam@quicinc.com>
Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://patch.msgid.link/20250702-qpic-snand-8bit-ecc-v2-1-ae2c17a30bb7@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'rust/helpers/workqueue.c')
0 files changed, 0 insertions, 0 deletions