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authorPing-Ke Shih <pkshih@realtek.com>2025-08-26 16:53:18 +0800
committerPing-Ke Shih <pkshih@realtek.com>2025-09-01 10:53:51 +0800
commit2d7514829950d6e4ab2fe7b855f21546b3420450 (patch)
treed8361dc7c4b0a643de6d729465abb2ec875a8dc7 /rust/helpers/xarray.c
parenta86a0fea192cf735c1693cef566d5bb8dc2b49fc (diff)
wifi: rtw89: pci: add group BD address design
The newly designed group BD address is to use the same starting DMA address with offset as below picture: Original DMA memory Group BD address +--------+ (*1) +---------+ (*2) +--------+ | CH 0 -|-------> | | <-------|- CH 0 | <-+--+--+--+ +--------+ | | | | | | | | | CH 1 -|-------> | | | CH 1 -|---+ | | | +--------+ | | | | | | | | CH 2 -|-------> | | | CH 2 -|------+ | | +--------+ | | | | | | | CH 3 -|-------> | | | CH 3 -|---------+ | +--------+ | | | | | | : -|-------> | | | : -|------------+ +--------+ | | +--------+ (*3; offset from CH 0) | CH 8 -|-------> | | <-------|- CH 8 | <-+ +--------+ | | | | | (offset from CH 8) | : -|-------> | | | : -|---+ +--------+ +---------+ +--------+ Compare (*1) and (*2), for original design, each DMA channel has individual DMA address, so it is not necessary to allocate continual DMA address across channels. For group BD address, only two DMA address are set, and each channel set the offset (*3) from base address. The element number and offset of a channel are encoded rather than a raw number, so add a function to translate numbers into hardware format. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20250826085318.28361-1-pkshih@realtek.com
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